VAX 8800/8700
IntroductionVAX 8800, code-named Nautilus, was the high-end model in the VAX 8800 family. It featured two CPUs and two VAXBI buses as standard. The VAX 8800 CPU was a heavily pipelined design, slightly predating the first commercial MIPS and SPARC designs.
It was intended that the 8800 was to have been replaced by the VAX 9000 on the high end,
but this project failed. Instead, the VAX 6000, originally a mid-range model replacing the
8700/8500, was upgraded to provide almost the same level of performance of the 8800 but at half the cost.
All of these were replaced by the VAX 7000/10000 in July 1992.
These are single-chip implementations based on the NVAX CPU and are the final dedicated VAX machines.
The VAX 8800 family is based on the NMI bus, which connects the CPU, memory controller and I/O adapters. The NMI bus is a 32-bit synchronous bus with a usable bandwidth of 64 MB/s.
Description
The VAX 8800 family central processing unit (CPU) operated at 22.22 MHz (45 ns cycle time) and was implemented with discrete emitter-coupled logic (ECL) devices spread over eight modules. The majority of the ECL devices are macrocell arrays with 1,200 logic gates, while the general-purpose registers and floating-point units are custom logic devices developed by Digital. The CPU had 64 KB of cache implemented with 10ns and 15ns ECL random access memory devices.
Memory
The VAX 8800 and 8700 supported one to eight memory array modules; the VAX 8550 and 8500, one to five.
The memory array modules are installed in a dedicated backplane separate from the NMI backplane.
The VAX 8800 and VAX 8700 support 4 to 32MB of memory, the VAX 8500 and VAX 8550 4 to 20MB,
using the 4 MB memory module. When the 16 MB memory module was introduced,
the memory capacity of the VAX 8800 and 8700 increased to 128 MB, and that of the VAX 8550 and 8500 to 80 MB.
Additionally when the 64 MB memory module was introduced, the memory capacity of the VAX 8800 and 8700
increased to 512 MB and that of the VAX 8550 and 8500 to 320MB.
The memory system consists of three major parts, a memory controller, a transistor-transistor logic (TTL) bus and one to eight memory array modules. The memory controller is implemented with ECL gate arrays and resides on an NMI bus module. It implements a TTL bus to which memory array modules are connected.
Three memory modules were available for the VAX 8800: a 4 MB module, a 16 MB module and a 64 MB module. The 4 MB array module is an eight-layer printed circuit board populated by metal oxide semiconductor (MOS) dynamic random access memory (DRAM) devices and medium-scale integration (MSI) FAST transistor-transistor logic (TTL) devices in roughly equal numbers. The 16 MB array module is similar to the 4 MB module, but contains eight surface-mounted daughter boards, each containing 2 MB of memory built from DRAMs.
Input/output
The VAX 8800 uses the VAXBI bus for input/output. The VAX 8800 supports up to four VAXBI buses, with each bus supporting up to 16 I/O devices. The VAXBI bus is interfaced to the NMI bus by a NBI adapter containing a chip implementing the VAXBI bus protocol. The NBI adapter handles all CPU references and direct memory access (DMA) transactions to and from the I/O devices. The adapter operates at 5 MHz and asynchronously to the CPU as it generates its own clock signal. The NBI adapter consists of two modules, the NBIA and NBIB. The NBIA is the NMI side of the adapter, and the NBIB the VAXBI side.
Console System
The VAX Console is a DEC Professional Series PC-38N. This is a PRO-380 with a real-time interface (RTI) that is used as the console for the Nautilus family of processors. The RTI has two serial line units: one connects to the VAX environmental monitoring module (EMM) and the other is a spare that can be used for data transfer.
The RTI's IEEE-488 interface is unused. The RTI's programmable 24 bit peripheral interface (PPI) is configured as three 8-bit ports for data, address, and control signals between the Nautilus system console interface and the VAX console.
The console's primary function is to bootstrap the system. The Nautilus family of processors has no non-volatile memory. The console sets configuration registers, loads CPU microcode into the writeable controls store (WCS), performs processor module diagnostic tests, resets the TOY clock (time-of-year clock), logs certain types of errors, performs other supervisory functions, and is the interface for field service diagnosis and testing.
Polarstar
Polarstar was a variant of Nautilus with one to four processors and an updated console processor.
DEC sold pre-configured clusters with processors, HSC's and storage arrays. A VAX 8978 is eight VAX 8810s (4GB RAM), two HSC's, two SA482's, four TA79's and a MicroVAX II as console. A VAX 8974 is something similar with only four VAX 8810 processors and fewer I/O devices.
The models were:
- VAX 8810 - A single processor system
- VAX 8820 - A two processor system
- VAX 8830 - A three processor system
- VAX 8840 - A four processor system
- VAX 8842 - A cluster of two VAX 8820 systems
- VAX 8974 - Introduced on 20 January 1987, it was a cluster of four VAX 8810 systems
- VAX 8978 - introduced on 20 January 1987, it was a cluster of eight VAX 8810 systems