VAX 6XX0

Introduction
Introduced in April of 1988, the VAX 6000 system was the most successful midrange system in the company’s history, with the fastest time-to-market and the most units sold. The VAX 6000 was the first volume SMP VAX. In the first six weeks of production, there were 500 units shipped. The shipments grew from a rate of zero to 6,000 units a year in about five months, and continued for a couple of years.

The most significant attribute of the VAX 6000 was that it introduced the concept of rapid technology-based upgrades. With previous Digital systems, it wasn’t possible to increase power simply by replacing processor boards. The VAX 6000 introduced the concept of plug-and-play; as a faster processor became available the customer could unplug the old processor, plug in the new processor, and the original equipment would never have to be thrown away. This allowed customers to increase power as they needed and protect their investments in hardware and software.

The VAX 6000 series of computers were scalable symmetric multiprocessing systems that could be expanded from one to 6 CPUs for some models. The idea being that as clients need more compute power they could incremental add more CPUs to increase processing capacity.

The VAX 6000 was housed in a cabinet which contained three card cages in the upper portion: a 14-slot XMI card cage on the right for CPU and memory modules, and optional VAXBI Bus hardware on the left. The VAXBI hardware distinguished two versions of the VAX 6000 platform, XMI-1 and XMI-2. XMI-1 differed from XMI-2 by requiring a DWMBA adapter and the presence of two 6-slot VAXBI channels, whereas in the XMI-2 platform, VAXBI was an optional feature and, if required, it was provided as a single 12-slot channel. In both versions, VAXBI was provided by two 6-slot VAXBI card cages. The XMI bus is 64 bits wide and interconnects the processors with the memory modules. All I/O devices connect to the VAXBI bus. One processor becomes the boot processor during power-up, and that boot processor handles all system communication. The other processors become secondary processors and receive system information from the primary processor. Each processor has a CPU chip with cache, a floating point processor, a secondary cache, a writable PROM for system parameters and a custom gate array for interfacing to the XMI bus.

Below the card cages was the cooling system, which took up most of the volume in the cabinet. The bottom of the cabinet contained a provisions for an optional battery backup unit and two RA90 or RA92 hard disk drives. The battery backup unit could provide power to the system for one second in the event of a power failure, after which the system ceased to operate, but continued to preserve the data in the cache and memory for ten minutes.

The cabinet was 154 cm (60.5 in) high, 78 cm (30.5 in) wide and deep; and weighed 341 kg (750 lbs).

VAX6000 Series Cabinet

VAX6220 ExteriorVAX6220 Interior
VAX6220 VAX6220

VAX6000 Models and Performance Specifications

ModelCPUCycle Time (ns)VUP
62X0KA62802.8
63X0KA62B603.8
64X0KA64A287
65X0KA65A1613
66X0KA66A1232

The original VAX 6000 series used the CVAX chip. The CVAX chip was soon followed by the Rigel chip, the company’s third 32-bit microprocessor. The Rigel chip was manufactured in 1.5-micron CMOS technology. Introduced in July 1989, the Rigel chip shipped in the VAX 6400 system and later, in the VAX 4000 system. Rigel also included the first implementation of the vector extension of the VAX architecture.

In October 1990, DIGITAL introduced the Mariah chip set, which shipped in the VAX 6500. An improvement on the Rigel chip set, the Mariah chip set was manufactured in 1.0-micron CMOS technology. The VAX 6500 processor delivered approximately 13 times the power of a VAX-11/780 system, per processor. The VAX 6500 systems implemented a new cache technique called write-back cache, which reduced CPU-to-memory traffic on the system bus, allowing multiprocessor systems to operate more efficiently

The NVAX chip was introduced in November of 1991. The company’s fourth VAX microprocessor, the NVAX chip was implemented in 0.75-micron CMOS technology and shipped in the VAX 6600. The NVAX incorporated the pipelined performance of the VAX 9000 and was the fastest CISC chip of its time, delivering 30 times the CPU speed of the VAX-11/780.

VAX 62X0
The VAX 6200 series of computers was introduced in 1988 and could accommodate from 1 to 4 CPUs in a chassis. The 62n0 notation was used where n represents the number of processors in the chassis. Models ranged from the VAX 6210 for a single CPU to the 6240 for a quad processor model. This series used the KA62A CVAX CPU with a cycle time of 80ns. It featured 1KB of on chip cache and 256KB external cache (160ns). Memory was a maximum of 256MBytes with ECC.

VAX 62X0 - SPECIFICATIONS
CPU
  • Code Name: Calypso/XCP
  • 6210 CPU: 1 X KA62
  • 6220 CPU: 2 X KA62
  • 6230 CPU: 3 X KA62
  • 6240 CPU: 4 X KA62
  • CPU Cycle Time: 80ns
MEMORY
  • Maximum Memory: 256MBytes ECC
I/O INTERFACES
  • Ethernet: BNC 10 MBit
  • Other: XMI, BI, CI with a max throughput 60MB/s
PERFORMANCE
  • 6210 VUPS: 2.8
  • 6220 VUPS: 5.5
  • 6230 VUPS: 8.3
  • 6240 VUPS: 11

VAX 63X0
The VAX 63X0 series of computers was introduced in 1989 and could accommodate from 1 to 6 CPUs in a chassis. Models ranged from the VAX 6310 for a single CPU to the 6360 for a six processor model. This series used the KA62B CVAX+ CPU with a cycle time of 60ns. It featured 1KB of on chip cache and 256KB external cache (120ns). Memory was a maximum of 256MBytes with ECC.

VAX 63X0 - SPECIFICATIONS
CPU
  • Code Name: Calypso/XCP
  • 6310 CPU: 1 X KA62B
  • 6320 CPU: 2 X KA62B
  • 6330 CPU: 3 X KA62B
  • 6340 CPU: 4 X KA62B
  • 6350 CPU: 5 X KA62B
  • 6360 CPU: 6 X KA62B
  • CPU Cycle Time: 60ns
MEMORY
  • Maximum Memory: 256MBytes ECC
I/O INTERFACES
  • Ethernet: BNC 10 MBit
  • Other: XMI, BI, CI with a max throughput 60MB/s
PERFORMANCE
  • 6310 VUPS: 3.8
  • 6320 VUPS: 7.5
  • 6330 VUPS: 11.3
  • 6340 VUPS: 15
  • 6350 VUPS: 18.6
  • 6360 VUPS: 22

VAX 64X0
The VAX 64X0 series of computers could accommodate from 1 to 6 CPUs in a chassis. Models ranged from the VAX 6410 for a single CPU to the 6460 for a six processor model. This series used the KA64A Rigel CPU with a cycle time of 28ns. It featured 2KB of on chip cache and 128KB external cache (120ns). Memory was a maximum of 256MBytes with ECC.

VAX 64X0 - SPECIFICATIONS
CPU
  • Code Name: Calypso/XRP
  • 6410 CPU: 1 X KA64A
  • 6420 CPU: 2 X KA64A
  • 6430 CPU: 3 X KA64A
  • 6440 CPU: 4 X KA64A
  • 6450 CPU: 5 X KA64A
  • 6460 CPU: 6 X KA64A
  • CPU Cycle Time: 28ns
MEMORY
  • Maximum Memory: 256MBytes ECC
I/O INTERFACES
  • Ethernet: BNC 10 MBit
  • Other: XMI, BI, CI with a max throughput 60MB/s
PERFORMANCE
  • 6410 VUPS: 7
  • 6420 VUPS: 13
  • 6430 VUPS: 19
  • 6440 VUPS: 25
  • 6450 VUPS: 31
  • 6460 VUPS: 36
  • 6410 TPS: 55
  • 6420 TPS: 90
  • 6430 TPS: 125
  • 6440 TPS: 155
  • 6450 TPS: 173
  • 6460 TPS: 185

VAX 65X0
The VAX 65X0 series of computers could accommodate from 1 to 6 CPUs in a chassis. Models ranged from the VAX 6510 for a single CPU to the 6560 for a six processor model. This series used the KA65A Rigel CPU with a cycle time of 16ns. It featured 2KB of on chip cache and 512KB external cache. Memory was a maximum of 512MBytes with ECC.

VAX 65X0 - SPECIFICATIONS
CPU
  • Code Name: Calypso/XMP
  • 6510 CPU: 1 X KA65A
  • 6520 CPU: 2 X KA65A
  • 6530 CPU: 3 X KA65A
  • 6540 CPU: 4 X KA65A
  • 6550 CPU: 5 X KA65A
  • 6560 CPU: 6 X KA65A
  • CPU Cycle Time: 16ns
MEMORY
  • Maximum Memory: 256MBytes ECC
I/O INTERFACES
  • Ethernet: BNC 10 MBit
  • Other: 1 XMI, 5 BI, 4 CI, 12 DSSI, 2 FDDI, 2 VME with a maximum throughput of 80MB/s
PERFORMANCE
  • 6510 VUPS: 13
  • 6520 VUPS: 25
  • 6530 VUPS: 37
  • 6540 VUPS: 49
  • 6550 VUPS: 61
  • 6560 VUPS: 72
  • 6510 TPS: 90
  • 6520 TPS: 150
  • 6530 TPS: 200
  • 6540 TPS: 250
  • 6550 TPS: 285
  • 6560 TPS: 300

VAX 66X0
The VAX 66X0 series of computers could accommodate from 1 to 6 CPUs in a chassis. Models ranged from the VAX 6610 for a single CPU to the 6660 for a six processor model. This series used the KA66A NVAX CPU with a cycle time of 12ns. It featured 10KB of on chip cache and 2MB external cache. Memory was a maximum of 512MBytes with ECC.

VAX 66X0 - SPECIFICATIONS
CPU
  • Code Name: Neptune
  • 6610 CPU: 1 X KA66A
  • 6620 CPU: 2 X KA66A
  • 6630 CPU: 3 X KA66A
  • 6640 CPU: 4 X KA66A
  • 6650 CPU: 5 X KA66A
  • 6660 CPU: 6 X KA66A
  • CPU Cycle Time: 12ns
MEMORY
  • Maximum Memory: 1GB
I/O INTERFACES
  • Ethernet: BNC 10 MBit
  • Other: 1 XMI, 5 BI, 4 CI, 12 DSSI, 2 FDDI, 2 VME with a maximum throughput of 80MB/s
PERFORMANCE
  • 6610 VUPS: 32
  • 6620 VUPS: 55
  • 6630 VUPS: 79
  • 6640 VUPS: 102
  • 6650 VUPS: 126
  • 6660 VUPS: 150
  • 6610 TPS: 185
  • 6620 TPS: 310
  • 6630 TPS: 420
  • 6640 TPS: 520
  • 6650 TPS: 585
  • 6660 TPS: 620

VAX6000 KA66A CPU
VAX6000 KA66A CPU

Guides

Document NameOrder Part No.Publication DateDomain
VAX6200 Options and Maintenance EK-620AA-MG-001May 1988USER
VAX6200 System Technical User's Guide EK-620AA-TM-001May 1988HW
VAX6400 Field Maintenance Print Set EMO1850-01October 1988HW

Sources: