This cumulative index is provided as a convenient means for readers to locate subjects referenced in the Digital Technical Journals from 1985 through 1994. Since the Journal was first published in 1985, it offered engineers and educators insights into the design of Digital's innovative engineering in such areas as software, systems, peripherals, semiconductors, and networking. With this index, readers can easily access that information.

• An Overview of the VAX 8600 System
• The VAX 8600 I Box, a Pipelined Implementation of the VAX Architecture
• The F Box, Floating Point in the VAX 8600 System
• Packaging the VAX 8600 Processor
• Signal Integrity in the VAX 8600 System
• Cooling the VAX 8600 Processor
• Designing reliability into the VAX 8600 System

• The MicroVAX 78032 Chip, A 32-Bit Microprocessor
• The MicroVAX 78132 Floating Point Chip
• Developing the MicroVAX II CPU Board
• The Evolution of the Custom CAD Suite Used on the Micro VAX 11 System
• The Making of a MicroVAX Workstation
• The RQDX3 Design Project
• The Evolution of Instruction Emulation for the MicroVAX Systems
• The TK50 Cartridge Tape Drive
• Porting ULTRIX Software to the MicroVAX System

• Digital Network Architecture Overview
• Performance Analysis and Modeling of Digital's Networking Architecture
• The DECnet/SNA Gateway Product - A Case Study in Cross Vendor Networking
• The Extended Local Area Network Architecture and LANBridge 100
• Terminal Servers on Ethernet Local Area Networks
• The DECnet-VAX Product-An Integrated Approach to Networking
• The DECnet-ULTRIX Software
• The DECnet-DOS System
• The Evolution of Network Management Products
• The NMCC/DECnet Monitor Design

• An Overview of the Four Systems in the VAX 8800 Family
• The VAX 8800 Microarchitecture
• The CPU Clock System in the VAX 8800 Family
• Aspects of the VAX 8800 C Box Design
• The Memory System in the VAX 8800 Family
• Floating Point in the VXX 8800 Family
• The VAX 8800 Input/Output System
• The VAXBI Bus - A Randomly Configurable Design
• A Logical Grounding Scheme for the VAX 8800 Processor
• The Simulation of Processor Performance for the VAX 8800 Family
• VMS Multiprocessing on the VAX 8800 Systems
• A Parallel Implementation of the Circuit Simulator SPICE on the VAX 8800 System
• The Impact of VAX 8800 Design Methodology on CAD Development
• On-line Manufacturing Data Access on the VAX 8800 Project

• The VAXcluster Concept: An Overview of a Distributed System
• The System Communication Architecture
• The VAX/VMS Distributed Lock Manager
• The Design and Implementation of a Distributed File System
• Local Area VAXcluster Systems
• VAXcluster Availability Modeling
• System Level Performance of VAX 8974 and 8978 Systems
• CI Bus Arbitration Performance in a VAXcluster System

• VAX/VMS Software Development Environment
• Software Productivity Measurements
• Language-Sensitive Editor
• VAX SCAN: Rule-based Text Processing Software
• Software Productivity Features Provided by the Ada Language and the VAX Ada Compiler
• Programmer Productivity Aspects of the VAX GKS and VAX PHIGS Products
• The VAX RALLY System - A Relational Fourth-Generation Language
• VTX and VALU - Software Productivity Tools for Distributed Applications Development
• Pragmatics in the Development of VAX Ada
• Development of a Graphical Program Generator
• Project Management of the VAX DEC/Test Manager Software Version 2.0
• Development of the VAX NOTES System
• Software Usability Engineering

• An Overview of the VAX 6200 Family of Systems
• The Architectural Definition Process of the VAX 6200 Family
• Interfacing a VAX Microprocessor to a High-speed Multiprocessing Bus
• The Role of Computer-aided Engineering in the Design of the VAX 6200 System
• VMS Symmetric Multiprocessing
• Performance Evaluation of the VAX 6200 Systems
• Overview of the Micro VAX 3500/3600 Processor Module
• Design of the MicroVAX 3500/3600 Second-level Cache
• The CVAX 78034 Chip, a 32-bit Second-generation VAX Microprocessor
• Development of the CVAX Floating Point Chip
• The System Support Chip, a Multifunction Chip for CVAX Systems
• Development of the CVAX Q22-bus Interface Chip
• The CVAX CMCTL - A CMOS Memory Controller Chip

• The Hierarchical Storage Controller, A Tightly Coupled Multiprocessor as Storage Server
• Performance Aspects of the HSC Controller
• VAXsimPLUS, A Fault Manager Implementation
• Disk Drive Technology Improvements in the RA90
• Control Systems Technology in Digital's Disk Drives
• Magnetic Domain Observations in Thin-film Heads Using Kerr Microscopy
• Margin Analysis on Magnetic Disk Recording Channels
• High Availability Mechanisms of VAX DBMS Software
• A Relational Database Management System for Production Applications

• Development of the VAX Distributed Name Service
• Design and Implementation of the VAX Distributed File Service
• Remote System Management in Network Environments
• The Evolution of the MAILbus
• VAX/VMS Services for MS-DOS
• The WAVE Tools Base for Protocol Testing
• Performance Evaluation of Distributed Applications and Services in the DECnet Environment
• Measurement and Analysis Techniques for DECnet Products
• Modeling and Analysis of the DECnet/SNA Gateway

• CDA Overview
• The Digital Document Interchange Format
• The Digital Table Interchange Format
• Development of the CDA Toolkit
• Inter-application Access and Integration
• The Design and Development of the DECdecision Product
• The Relationship between the DECwrite Editor and the Digital Document Interchange Format
• CDA in Science and Engineering

• Vector Processing on the VAXvector 6000 Model 400
• The VAX 6000 Model 400 Scalar Processor Module
• An Overview of the VAX 6000 Model 400 Chip Set
• VAX 6000 Model 400 Physical Technology
• VAX 6000 Model 400 CPU Chip Set Functional Design Verification
• Test and Qualification of the VAX 6000 Model 400 System
• Development of the DECstation 3100
• Compiler Optimization in RISC Systems

• An Overview of the DECwindows Architecture
• The Sample X11 Server Architecture
• Development of the XU1 Toolkit
• The DECwindows User Interface Language
• The Evolution of the X User Interface Style
• PEX: A Network-transparent Three-dimensional Graphics System
• XDPS: A Display Postscript System Extension for DECwindows
• The Development of DECwindows VMS Mail
• Ethernet Performance of Remote DECwindows Applications

• Design Strategy for the VAX 9000 System
• VAX Instructions That Illustrate the Architectural Features of the VAX 9000 CPU
• Semiconductor Technology in a High-performance VAX System
• Vector Processing on the VAX 9000 System
• HDSC and Multichip Unit Design and Manufacture
• The VAX 9000 Service Processor Unit
• Some Unique Features of the VAX 9000 Power System Design
• Synthesis in the CAD System Used to Design the VAX 9000 System
• Hierarchical Fault Detection and Isolation Strategy for the VAX 9000 System

• DECdta - Digital's Distributed Transaction Processing Architecture
• Digital's Transaction Processing Monitors
• Transaction Management Support in the VMS Operating System Kernel
• Performance Evaluation of Transaction Processing Systems
• Tools and Techniques for Preliminary Sizing of Transaction Processing Applications
• Database Availability for Transaction Processing
• Designing an Optimized Transaction Commit Protocol
• Verification of the First Fault-tolerant VMS system

• Fiber Distributed Data Interface Overview
• Development of the FDDI Physical Layer
• FDDI Data Link Development
• An Overview of the Common Node Software
• Development of the DECbridge 500 Product
• The DECconcentrator 500 Product
• DECelms - Managing Digital's FDDI and Ethernet Extended Local Area Networks
• ULTRIX Fiber Distributed Data Interface Networking Subsystem Implementation

• Design of VMS Volume Shadowing Phase II - Host-based Shadowing
• Application Design in a VAXcluster System
• New Availability Features of Local Area VAXcluster Systems
• Design of the DEC LANcontroller 400 Adapter
• The Architecture and Implementation of a High-performance FDDI Adapter
• Performance Analysis of a High-speed FDDI Adapter
• Performance Analysis of FDDI

• Hardware Accelerators for Bi-tonal Image Processing
• X Window Terminals
• ACCESS.bus, an Open Desktop Bus
• Design of the DECprint Common Printer Supervisor for VMS Systems
• The Common Printer Access Protocol
• Design of the Turbo Printserver 20 Controller

• An Overview of the PATHWORKS Product Family
• PATHWORKS for VMS File Server
• The Development of an Optimized PATHWORKS Transport Interface
• Design of the PATHWORKS for ULTRIX File Server
• DECnet Transport Architecture
• Microsoft Windows Network Virtual Device Drivers in PATHWORKS for DOS
• eXcursion for Windows: Integrating Two Windowing Systems
• Capacity Modeling of PATHWORKS Client-Server Workloads

• Microprocessor Performance and Process Complexity in CMOS Technologies
• Numerical Device and Process Simulation Tools in Transistor Design
• CMOS-4 Technology for Fast Logic and Dense on-chip Memory
• CMOS-4 Back-end Process Development for a VLSI 0.75µm Triple-level Interconnection Technology
• Implementation of Defect Reduction Strategies into VLSI Manufacturing
• A Yield Enhancement Methodology for Custom VLSI Manufacturing
• Transistor Hot Carrier Reliability Assurance in CMOS Technologies
• Electromigration Reliability of VLSI Interconnect

• The NVAX and NVAX+ High-performance VAX Microprocessors
• The NVAX CPU Chip: Design Challenges, Methods, and CAD Tools
• Logical Verification of the NVAX CPU Chip Design
• The VAX 6000 Model 600 Processor
• Design of the VAX 4000 Model 400, 500, and 600 Systems
• The Design of the VAX 4000 Model 100 and MicroVAX 3100 Model 90 Desktop Systems
• The VAXstation 4000 Model 90
• VAX 6000 Error Handling: A Pragmatic Approach

• Alpha AXP Architecture
• A 200-MHz 64-bit Dual-issue CMOS Microprocessor
• The Alpha Demonstration Unit: A High-performance Multiprocessor for Software and Chip Development
• Design and Performance of the DEC 4000 AXP Departmental Server Computing Systems
• Technical Description of the DEC 7000 and DEC 10000 AXP Family
• Porting OpenVMS from VAX to Alpha AXP
• The GEM Optimizing Compiler System
• Binary Translation
• Porting Digital's Database Management Products to the Alpha
• DECnet for OpenVMS AXP: A Case History
• Using Simulation to Develop and Port Software

• Overview of Digital's Open Networking
• The DECnet/OSI for OpenVMS Version 5.5 Implementation
• The ULTRIX Implementation of DECnet/OSI
• High-performance TCP/IP and UDP/IP Networking in DEC OSF/1 for Alpha AXP
• Routing Architecture
• Digital's Multiprotocol Routing Software Design
• The DECNIS 500/600 Multiprotocol Bridge/Router and Gateway
• Frame Relay Networks
• An Implementation of the OSI Upper Layers and Applications
• Network Management
• Design of the DECmcc Management Director

• Video Rendering
• Software Motion Pictures
• Digital Audio Compression
• The Megadoc Image Document Management System
• The Design of Multimedia Object Support in DEC Rdb
• DECspin - A Networked Desktop Videoconferencing Application
• LAN Addressing for Digital Video Data
• CASE Integration Using ACA Services
• DEC@aGlance - Integration of Desktop Tools and Manufacturing Process Information Systems

• International Cultural Differences in Software
• Unicode: A Universal Character Code
• The X/Open Internationalization Model
• The Ordering of Universal Character Strings
• International Distributed Systems - Architectural and Practical Issues
• Supporting the Chinese, Japanese, and Korean Languages in the OpenVMS Operating System
• Character Internationalization in Databases: A Case Study
• Japanese Input Method Independent of Applications

• Modeling the Cost of Software Quality
• Changing the Rules: A Pragmatic Approach to Product Development
• Defining Global Requirements with Distributed QFD
• DEC TP WORKcenter: A Software Process Case Study
• SEI-based Process Improvement Efforts at Digital
• Assessing the Quality of OpenVMS AXP: Software Measurement Using Subjective Data

• GIGAswitch System: A High-performance Packet-switching Platform
• Performance of DEC Rdb Vision 60 on AXP System
• Improving Process to Increase Productivity While Assuring Quality: A Case Study of the Volume Shadowing Port to OpenVMS AXP
• The Evolution of the Alpha AXP PC
• Digital's DECchip 21066: The First Cost-focused Alpha AXP Chip

• A Shared Memory MPP from Cray Research
• The E2COTS System and Alpha AXP Technology: The New Computer Standard for Military Use
• Volume Rendering with the Kubota 30 Imaging and Graphics Accelerator
• Development of Digital's PCI Chip Sets and Evaluation Kit for the DECchip 21064 Microprocessor
• Analysis of Data Compression in the DLT2000 Tape Drive

• Design of the AlphaServer Multiprocessor Server Systems
• The AlphaServer 2100 I/O Subsystem
• DEC OSF/1 Version 3.0 Symmetric Multiprocessing Implementation
• DXML: A High-performance Scientific Subroutine Library
• The KAP Parallelizer for DEC Fortran and DEC C Programs

• The Architecture and Design of HS-series Storageworks Array Controllers
• Policy Resolution in Workflow Management Systems
• The Design of DECmodel for Windows
• The Design of ManageWORKS: A User Interface Framework
• The Structure of the OpenVMS Management Station
• Automatic, Network-directed Operating System Software Upgrades: A Platform-independent Approach

• DB Integrator: Open Middleware for Data Access
• ACMSxp Open Distributed Transaction Processing
• An Open, Distributable, Three-tier, Client-Server Architecture with Transaction Semantics
• The AlphaServer 8000 Series: High-end Server Platform Development
• Digital's High-performance CMOS ASIC
• The Second-generation Processor Module for AlphaServer 2100 Systems
• The Design and Verification of the AlphaStation 600 5-series Workstation
• Circuit Implementation of a 300-MHz 64-bit Second-generation CMOS Alpha CPU
• Internal Organization of the Alpha 21164, a 300-MHz 64-bit Quad-issue CMOS RISC Microprocessor
• Functional Verification of a Multiple-issue, Pipelined, Superscalar Alpha Processor - the Alpha 21164 CPU Chip

• DEC FUSE: Building a Graphical Software Development Environment from UNIX Tools
• Adding a Data Visualization Tool to DEC FUSE
• Multivendor Integration Architecture: Standards, Compliance Testing, and Applications
• Integrating Applications with Digital's Framework-based Environment
• Project Gabriel: Automated Software Deployment in a Large Commercial Network

• Compiling High Performance Fortran for Distributed-memory Systems
• Design of Digital's Parallel Software Environment
• An Overview of the Sequoia 2000 Project
• The Sequoia 2000 Electronic Repository
• Tecate: A Software Platform for Browsing and Visualizing Data from Networked Data Sources
• High-performance I/0 and Networking Software in Sequoia 2000

• DECtalk Software: Text-to-Speech Technology and Implementation
• The J300 Family of Video and Audio Adapters: Architecture and Hardware Design
• The J300 Family of Video and Audio Adapters: Software Architecture
• Software-only Compression, Rendering, and Playback of Digital Video
• Integrating Video Rendering into Graphics Accelerator Chips
• Technical Description of the DECsafe Available Server Environment
• Parasight: Debugging and Analyzing Real-time Applications under Digital UNIX

• Design of the TruCluster Multicomputer System for the Digital UNIX Environment
• Delivering Binary Object Modification Tools for Program Analysis and Optimization
• Design of eXcursion Version 2 for Windows, Windows NT, and Windows 95
• Integrating Multiple Directory Services
• Design of the Common Directory Interface for DECnet/OSI

• Overview of the Spiralog File System
• Design of the Server for the Spiralog File System
• Designing a Fast, On-line Backup System for a Log-structured File System
• Integrating the Spiralog File System into the OpenVMS Operating System
• Extending OpenVMS for 64-bit Addressable Virtual Memory
• The OpenVMS Mixed Pointer Size Environment
• Adding 64-bit Pointer Support to a 32-bit Run-time Library
• Building a High-performance Message-passing System for Memory Channel Clusters
• The Design of User Interfaces for Digital Speech Recognition Software

• Internet Protocol Version 6 and the Digital UNIX Implementation Experience Internet Protocol Version 6 and the Digital UNIX Implementation Experience
• Preserving Computing's Past: Restoration and Simulation
• Modern Fortran Revived as the Language of Scientific Parallel Computing
• Performance Measurement of TruCluster Systems under the TPC-C Benchmark
• Performance Analysis Using Very Large Memory on the 64-bit Alphaserver System
• Building Collaboration Software for the Internet

• AlphaServer 4100 Performance Characterization
• The AlphaServer 4100 Cached Processor Module Architecture and Design
• The AlphaServer 4100 Low-cost Clock Distribution System
• Design and Implementation of the AlphaServer 4100 CPU and Memory Architecture
• High Performance I/0 Design in the AlphaServer 4100 Symmetric Multiprocessing System
• Design of the 64-bit Option for the Oracle7 Relational Database Management System
• VLM Capabilities of the Sybase System 11 SQL Server
• Measured Effects of Adding Byte and Word Instructions to the Alpha Architecture

• DIGITAL FX!32: Combining Emulation and Binary Translation
• Development of the Fortran Module Wizard within DIGITAL Visual Fortran
• Architecture and Implementation of MEMORY CHANNEL 2
• Integrating ObjectBroker and DCE Security
• A 160-MHz, 32-b, 0.5-W CMOS RISC Microprocessor

• The AltaVista Tunnel: Using the Internet to Extend Corporate Networks
• Protecting a Private Network: The AltaVista Firewall
• Developing Internet Software: AltaVista Mail
• DIGITAL Personal Workstations: The Design of High-performance, Low-cost Alpha Systems
• Design of the 21174 Memory Controller for DIGITAL Personal Workstations

• Recent Advances in Basic Physical Technology for Parallel SCSI: UltraSCSI, Expanders, Interconnect, and Hot Plugging
• Development of Router Clusters to Provide Fast Failover in IP Networks
• Shared Desktop: A Collaborative Tool for Sharing 3-D Applications among Different Window Systems
• Challenges in Designing an HPF Debugger

• Optimizing Alpha Executables on Windows NT with Spike
• Analyzing Memory Access Patterns of Programs on Alpha-based Architectures
• OpenVMS Alpha 64-bit Very Large Memory Design
• PowerStorm 4DT A High-performance Graphics Software Architecture
• DART Fast Application-level Networking via Data-copy Avoidance

• Tracing and Characterization of Windows NT-based System Workloads
• Automatic Template Instantiation in DIGITAL C++
• Measurement and Analysis of C and C++ Performance
• Alias Analysis in the DEC C and DIGITAL C++ Compilers
• Compiler Optimization for Superscalar Systems: Global Instruction Scheduling without Copies
• Maximizing Multiprocessor Performance with the SUIF Compiler
• Debugging Optimized Code: Concepts and Implementation on DIGITAL Alpha Systems
• Differential Testing for Software